Asian Tech Press (Nov 02) -- Synopsys announced that its digital and custom design platforms for TSMC's N3 process technology had been certified by TSMC to jointly and continuously optimize the power consumption, Power-Performance-Area (PPA) of next-generation System-on-Chip (SoC).

This certification includes rigorous validation based on the latest version of TSMC's Design Rule Manual (DRM) and Process Design Kit (PDK), based on years of close collaboration. It is the result of a long-term strategic partnership between Synopsys and TSMC. In addition, Synopsys' digital and custom design platforms are certified for TSMC's N4 process.