Apple said to launch M5 chip in late 2025, made with TSMC's 3nm process
Oct.29,2024

Asia Tech Wire (Oct 29) -- Apple is actively working on its next-generation M5 chip, which is due to debut at the end of 2025 and utilize TSMC's 3nm process technology, according to the latest market news.

Bloomberg's Mark Gurman, who first reported the news, expects that Apple may debut the new chip in the new iPad Pro lineup.

Apple has adjusted its product strategy this year, first equipping the 11-inch and 13-inch iPad Pros with the M4 chip, and then releasing the MacBook Pro with the M4 chip on Monday.

Based on this change in strategy, the market predicts that the new iPad Pro series will be expected to be the first to come with the upcoming M5 chip.

However, the new model is not expected to see much of a change in design, considering that Apple just released the current lineup of iPad Pros six months ago.

Gurman noted that Apple usually updates its iPad Pro lineup every 18 months or so.

Given that the M5 chip is expected to launch late next year, he believes the next-generation iPad Pro could be released in late 2025 or the first half of 2026.

And since the current product design is relatively new, Gurman doesn't expect much change in the next-generation iPad Pro other than the chip upgrade.

Meanwhile, Taiwan's Economic Daily News also cited industry sources as saying that Apple has been actively investing in the development of the M5 chip, and continues to work with TSMC to produce it using its 3nm process technology.

This news coincides with Gurman's report, further increasing the likelihood that the M5 chip will be available by the end of next year.

It's worth noting that the M5 chip is expected to use the 3nm process, despite analysts predicting that Apple will move to TSMC's 2nm process in 2026.

However, the M5 chip will introduce TSMC's System on Integrated Chip (SoIC) packaging technology, which will be a significant technological difference compared to its predecessor.

TSMC unveiled its SoIC packaging technology for the first time in 2018, which allows chips to be stacked in a three-dimensional structure, leading to better thermal management, lower current leakage, and better electrical performance.

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